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基于MPSOC上电启动电源分析
Technical Reference Manual
(内部版本)
1.版本说明
Data | Author | Version Revision |
---|---|---|
2021/01/18 | chengyang | 1.0 初定版本 |
2021/01/22 | chengyang | 1.2 完善时序 |
2.概要
主要针对MPSOC硬件进行分析设计。
- 参考黑金ZU3CG开发板
- 参考 ds925-zynq-ultrascale-plus:DC and AC Switching Characteristics.pdf
- 参考 ug1075-Zynq UltraScale+ Device Packaging and Pinouts Product Specification.pdf
3.分析
整个启动顺序分为PS和PL,两部分完全独立;
PS分为两步:
第一:The low-power domain (LPD)
第二:The full-power domain (FPD)
PS与PL完全独立,并行。
3.1.PS-LPD启动顺序
> To achieve minimum current draw and ensure that the I/Os are 3-stated at power-on, the recommended power
> on sequence for the low-power domain (LPD) is listed. The recommended power-off sequence is the reverse of> the power-on sequence.> 1. VCC_PSINTLP> 2. VCC_PSAUX, VCC_PSADC, and VCC_PSPLL in any order or simultaneously.> 3. VCCO_PSIO
以 4CG为例:
LPD | ||||
启动顺序 | 1 | 2 | 3 | |
电压名称 | VCC_PSINTLP | VCC_PSAUX/VCC_PSADC | VCC_PSPLL | VCCO_PSIO0_500/ VCCO_PSIO1_501/ VCCO_PSIO2_502/ VCCO_PSIO3_503 |
电压值 | 0.85v | 1.8v | 1.2v | 1.8v |
3.2.PS-FPD启动顺序
> To achieve minimum current draw and ensure that the I/Os are 3-stated at power-on, the recommended power
> on sequence for the full-power domain (FPD) is listed. The recommended power-off sequence is the reverse of> the power-on sequence.> 1. VCC_PSINTFP and VCC_PSINTFP_DDR driven from the same supply source.> 2. VPS_MGTRAVCC and VCC_PSDDR_PLL in any order or simultaneously.> 3. VPS_MGTRAVTT and VCCO_PSDDR in any order or simultaneously.
以 4CG为例:
FPD | |||||
启动顺序 | 4 | 5 | 6 | ||
电压名称 | VCC_PSINTFP/VCC_PSINTFP_DDR | PS_MGTRAVCC | VCC_PSDDR_PLL | PS_MGTRAVTT | VCCO_PSDDR |
电压值 | 0.85v | 0.85v | 1.8v | 1.8v | 1.2v |
3.3.PL启动顺序
> The recommended power-on sequence is VCCINT, VCCINT_IO/VCCBRAM/VCCINT_VCU, VCCAUX/VCCAUX_IO, and VCCO> to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The recommended power
> off sequence is the reverse of the power-on sequence. If VCCINT and VCCINT_IO/VCCBRAM have the same> recommended voltage levels, they can be powered by the same supply and ramped simultaneously. VCCINT_IO> must be connected to VCCBRAM. If VCCAUX/VCCAUX_IO and VCCO have the same recommended voltage levels,> they can be powered by the same supply and ramped simultaneously. VCCAUX and VCCAUX_IO must be connected> together. VCCADC and VREF can be powered at any time and have no power-up sequencing requirements.> The recommended power-on sequence to achieve minimum current draw for the GTH or GTY transceivers is> VCCINT, VMGTAVCC, VMGTAVTT OR VMGTAVCC, VCCINT, VMGTAVTT. There is no recommended sequencing for> VMGTVCCAUX. Both VMGTAVCC and VCCINT can be ramped simultaneously. The recommended power-off sequence> is the reverse of the power-on sequence to achieve minimum current draw. If these recommended sequences> are not met, current drawn from VMGTAVTT can be higher than specifications during power-up and power-down.
-
总结上述文档:
-
PL-逻辑
-
VCCINT 和 VCCINT_IO 和 VCCBRAM 由同一组电源供电(0.85v)
-
VCCAUX 和 VCCAUX_IO 由同一组电源供电(1.8v)* VCCADC 和 VREF没有上电顺序要求;
-
PL-MGT
-
VCCINT(0.85v) 和 MGTAVCC(0.9v)
-
MGTAVTT(1.2v)
-
MGTVCCAUX(1.8v)没有启动要求
-
以 4CG为例:
启动顺序 | 1 | 2 |
电压名称 | VCCINT/VCCINT_IO /VCCBRAM | VCCAUX/VCCAUX_IO |
电压值 | 0.85v | 1.8v |
启动顺序 | 1 | 2 | |
电压名称 | VCCINT | MGTAVCC | MGTAVTT |
电压值 | 0.85v | 0.9v | 1.2v |
3.疑问
- ·· VCCO 的启动顺序 ? ··
答案:最后启动
4.预定功能IO
PS_POR_B : LPD启动完成后拉高
PS_PROG_B :LPD启动完成后拉高
PS_SRST_B : LPD启动完成后拉高
S_SRST_B : LPD启动完成后拉高
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