s3c6410硬件NAND FLASH CONTROLLER（NAND FLASH 控制器）

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1、OVERVIEW

The 6410 is equipped with an internal SRAM buffer called ‘Steppingstone’.
Generally, the boot code will copy NAND flash content to SDRAM. Using hardware ECC, the NAND flash data
validity will be checked. After the NAND flash content is copied to SDRAM, main program will be executed on
SDRAM.To use NAND Flash, 'XSELNAND' pin must be connected to High Level.

S3C6410 具备了一个内部SRAM缓冲器，叫做“STEPPINGSTONE”，支持NAND FLASH 的系统引导。当系统启动时，NAND FLASH 存储器的前面几KB的数据将被自动载入到STEPPINGSTONE 中，然后系统自动执行这些载入的引导代码。通常情况下，这些引导代码需要将NAND FLASH 中程序内容拷贝到SDRAM 中，在引导代码执行完毕后跳转到SDRAM 执行。使用S3C6410 内部硬件ECC 功能可以对NAND FLASH 的数据进行有效性的检测。

2、FEATURES

NAND flash controller features include:
1. NAND Flash memory I/F: Support 512Bytes and 2KB Page . 支持512 字节和2KB 页。
2. Software mode: User can directly access NAND flash memory. for example this feature can be used in
read/erase/program NAND flash memory.用户可以直接访问NAND FLASH 控制器。例如这个特性可以用于读/擦/编程NAND FLASH存储器。
3. Interface: 8-bit NAND flash memory interface bus. 8 位NAND FLASH 存储器接口总线。
4. Hardware ECC generation, detection and indication (Software correction). 硬件ECC 产生、检测和标志（软件纠正）。
5. Support both SLC and MLC NAND flash memory : 1-bit ECC, 4-bit and 8-bit ECC for NAND flash.支持SLC 和MLC 的NAND FLASH 控制器：1 位ECC 用于SLC，4 位和8位ECC 用于MLC 的NAND FLASH。

(Recommend: 1bit ECC for SLC, 4bit and 8bit ECC for MLC NAND Flash)

注：SLC和MLC不同
6. SFR I/F: Support Byte/half word/word access to Data and ECC Data register, and Word access to other
registers 支持字节/半字/字数据的访问和ECC 的数据寄存器，用字来访问其他寄存器。
7. SteppingStone I/F: Support Byte/half word/word access.
8. The Steppingstone 8-KB internal SRAM buffer can be used for another purpose .

3、BLOCK DIAGRAM

4、NAND FLASH MEMORY TIMING

5、NAND FLASH ACCESS

6410 does not support NAND flash access mechanism directly. It only supports signal control mechanism for NAND flash access. Therefore software is responsible for accessing NAND flash memory correctly.

S3C6410 仅支持软件模式访问。
1. Writing to the command register (NFCMMD) = the NAND Flash Memory command cycle
2. Writing to the address register (NFADDR) = the NAND Flash Memory address cycle
3. Writing to the data register (NFDATA) = write data to the NAND Flash Memory (write cycle)
4. Reading from the data register (NFDATA) = read data from the NAND Flash Memory (read cycle)
5. Reading main ECC registers and Spare ECC registers (NFMECCD0/1, NFSECCD) = read data from the
NAND Flash Memory

In NAND flash access, you must check the RnB status input pin by polling the signal or using interrupt.

（1）写命令寄存器=NAND FLASH 存储器命令周期。
（2）写地址寄存器=NAND FLASH 存储器地址周期。
（3）写数据寄存器=写数据到NAND FLASH 存储器（写周期）。
（4）读数据寄存器=从NAND FLASH 存储器读数据（读周期）。
（5）读主ECC 寄存器和备用ECC 寄存器=从NAND FLASH 存储器读数据。
在软件模式下，必须通过利用检测和中断来检查RnB 输入引脚的状态。

6、1-BIT / 4-BIT / 8-BIT ECC (ERROR CORRECTION CODE)

NAND flash controller has four ECC (Error Correction Code) modules for 1 bit ECC , one for 4bit ECC and one for
8bit ECC. NAND FLASH 控制器有4 个ECC（错误纠正码）模块用于SLC 类型的NAND FLASH 存储器，1 个ECC 模块用于MLC 类型的NAND FLASH 存储器。
The 1bit ECC modules for main data area can be used for (up to) 2048 bytes ECC parity code generation, and 1
bit ECC module for spare area can be used for (up to) 4 bytes ECC Parity code generation.这些模块对于主存储区可用于（高达）2048 字节ECC 奇偶校验码的产生，对于备用区可用于（高达）4 字节ECC 奇偶校验码的产生。
Both 4bit and 8bit ECC modules can be used for only 512 bytes ECC parity code generation.
4 bit and 8bit ECC modules generate the parity codes for each 512 byte. However, 1 bit ECC modules generate
parity code per byte lane separately.

6.1、ECC MODULE FEATURES

ECC generation is controlled by the ECC Lock (MainECCLock, SpareECCLock) bit of the Control register. When
ECCLock is Low, ECC codes are generated by the H/W ECC modules
4bit ECC modules generate max 7byte parity codes and 8 bit ECC modules generate 13byte parity codes at each
512/24 bytes.

ECC 的产生是通过ECC 锁定（MainECCLock，SpareECCLock）位的控制寄存器来控制的。当ECCLock 为低时，ECC 校验码通过H/W ECC 模块产生。

6.1.1、1-BIT ECC PROGRAMMING ENCODING AND DECODING

6.1.2、4-BIT ECC PROGRAMMING GUIDE (ENCODING)

6.1.3、4-BIT ECC PROGRAMMING GUIDE (DECODING)

6.1.4、8-BIT ECC PROGRAMMING GUIDE (ENCODING)

6.1.5、8-BIT ECC PROGRAMMING GUIDE (DECODING)

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