本文主要是介绍Spartan-3 LVDS UCF，希望对大家解决编程问题提供一定的参考价值，需要的开发者们随着小编来一起学习吧！
--How should I choose the pair of pins on the FPGA for my LVDS signal?
Does the LDVS pair need to be something like: LXXP / LXXN, for example will this work on the Pipistrello?
LVDS pos -> WingA_1 -> IO_L51P_M1DQ12_1
LVDS neg -> WingB_14 -> IO_L51N_M1DQ13_1
or can any pair of FPGA pins make a differential pair? and how is that defined as one logic signal in a UCF file?
/
Hi,
You want to look for a pair of pins that are part of differential input that are close together on the wing header.
In your constraints file you do this (this is on the Papilio Pro):
Code: [Select]
NET test_signal_p LOC = "P51" | IOSTANDARD = LVDS_33;
NET test_signal_n LOC = "P50" | IOSTANDARD = LVDS_33;
And then in you HDL you use a IBUFDS to convert the differential signals into the single ended signal used in the design:
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library UNISIM;
use UNISIM.VComponents.all;
...
-- Input buffer
i_IBUFDS : IBUFDS
generic map (
DIFF_TERM => FALSE,
IBUF_LOW_PWR => TRUE,
IOSTANDARD => "DEFAULT")
port map (
O => test_signal,
I => test_signal_p,
IB => test_signal_n
);
Here are the four pairs I used for HDMI input (I know that it isn't the same as LVDS, but the pin locations are what you need....). Oh and due to PCB layout constraints some of the pairs are flipped around (with the _p connected to a N pin, and the _n connected to the P pin) - it would pay to cross-reference them with the datasheet - but here are four pairs that I can vouch for!
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NET "hdmi_c2_p" LOC="P57";
NET "hdmi_c2_n" LOC="P58";
NET "hdmi_c1_p" LOC="P55";
NET "hdmi_c1_n" LOC="P56";
NET "hdmi_c0_p" LOC="P62";
NET "hdmi_c0_n" LOC="P61";
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