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ST官方标准库V3.5默认的外部晶振频率为8M,实际使用中外部晶振需要修改为16M;
经过实验,修改有效,具体的patch如下:
修改 HSE_VALUE 值
diff --git "a/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h" "b/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"
index 8bf7624..e0ad316 100644
--- "a/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"
+++ "b/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"
@@ -116,7 +116,9 @@#ifdef STM32F10X_CL #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */#else
- #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+// #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE ((uint32_t)16000000) /*!< Value of the External oscillator in Hz */
+#endif /* STM32F10X_CL */#endif /* HSE_VALUE */
修改 SetSysClockTo72 函数中RCC 配置
diff --git "a/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c" "b/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"
index 71efc85..eb912bd 100644
--- "a/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"
+++ "b/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"@@ -1053,7 +1054,11 @@ static void SetSysClockTo72(void)/* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |RCC_CFGR_PLLMULL));
- RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
+
+// RCC_CFGR_HPRE_DIV2
+ //RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9 | RCC_CFGR_PPRE1_DIV2);
+ RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9 | RCC_CFGR_PLLXTPRE_HSE_Div2);
+#endif /* STM32F10X_CL *//* Enable PLL */STM32F10X_CL *//* Enable PLL */
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