FPD-LINK III

2023-10-11 01:18
文章标签 link iii fpd

本文主要是介绍FPD-LINK III,希望对大家解决编程问题提供一定的参考价值,需要的开发者们随着小编来一起学习吧!

FPD-Link III Serializer/Deserializer (SerDes)

FPD-Link III 串行器/解串器在信息娱乐系统显示屏和 ADAS 摄像头应用中通过一条 STP 或同轴电缆传输视频、音频、控制数据和电力。

典型连接

FPD-Link is the original high-speed digital video interface created in 1996 by National Semiconductor (now within Texas Instruments). It is a free and open standard for connecting the output from a graphics processing unit in a laptop, tablet computer, flat panel display, or LCD television to the display panel’s timing controller. Most laptops, tablet computers, flat-panel monitors, and TVs use this interface internally. Laptops designed before 1996 and devices with smaller display resolutions often use a TTL or CMOS interface instead.

Automotive and more applications[edit]
Automotive infotainment displays for navigation systems started using FPD-Link in 2001. BMW was the first car maker to use FPD-Link in their cars for transferring navigation graphics from the head unit to the central information display. Many other car manufacturers then started using FPD-Link. Today, most infotainment and driver assist applications are using FPD-Link II and FPD-Link III to benefit from the embedded clock and control signals, which will be described in the next section. One of the main benefits is the reduced cable size and weight due to the single wire pair for all the data and clock signals.

The automotive environment is known to be one of the harshest for electronic equipment due to inherent extreme temperatures and electrical transients. In order to satisfy these stringent reliability requirements, the FPD-Link II and III chipsets meet or exceed the AEC-Q100 automotive reliability standard for integrated circuits, and the ISO 10605 standard for automotive ESD applications.

Another display interface based on FPD-Link is OpenLDI. (Sometimes the OpenLDI and FPD-Link terms are used interchangeably.) It enables longer cable lengths because of a built-in DC balance coding to reduce the effects of intersymbol interference. In the Open LDI version of DC balance coding, one of the seven serialized bits indicates whether the coding scheme needs to invert the other six bits transmitted in the clock period to maintain DC balance. Therefore, each LVDS pair other than the clock pair effectively transmits six bits per clock cycle. However, OpenLDI lost the video-transfer standards competition to Digital Visual Interface (DVI) in the early twenty-first century, and the result was stand-alone LCD panels using DVI to receive video from a desktop computer.

FPD-Link III[edit]
FPD-Link III was introduced in 2010. Further improving FPD-Link II, FPD-Link III’s major feature is embedding a bidirectional communication channel on the same differential pair. This bidirectional channel transfers control signals between source and destination in addition to the clock and streaming video data. Therefore, FPD-Link III even further reduces cable cost by eliminating cables for control channels such as I2C and CAN bus.

FPD-Link III’s embedded control channel uses the I2C bus protocol between the source and destination in the first implementations. (However, it is not limited to I2C.) The I2C master can read and write to all the slaves on the other side of the FPD-Link III chipset, which is effectively transparent to the I2C master and slaves communications. For example, this enables infotainment head units to control and configure displays, and image processing units to control and configure cameras using the same twisted pair cable as the data transmission.

The Digital Content Protection LLC approved FPD-Link III in 2009 as a high-bandwidth interface for carrying content whose owner wants HDCP security. This approval enables the FPD-Link III chipsets to include the highly confidential HDCP keys and state machines to encrypt the content. The embedded control channel in the FPD-Link III chipsets simplifies the key exchange protocols between the source and destinations that verify the destination is secure.

An additional new feature, FPD-Link III stops using LVDS technology and uses only CML for the serialized high-speed signals. This enables it to easily work at data rates greater than 3 Gbit/s on cables greater than 10m long. An additional benefit for using CML is the coax-cable drive capability. The CML technology works well when driving the single conductor in coax cables. Since coax cables are very good at controlling impedance and noise, they reduce the need for differential signaling, which better tolerates impedance discontinuities and noise interference.

Another added benefit for FPD-Link III is the adaptive equalization built into the deserializer. The input signal to the deserializer usually has diminished integrity. This typically results from the inter-symbol interference (ISI) due to cable loss. The adaptive equalizer can sense the poor signal and restore it to the original integrity. This feature is useful in every application where the cable can vary in length, operating temperature, and humidity because these variables affect the ISI resulting from the low-pass filter effect of the cable.

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