全志平台uboot中GPIO和PIN脚配置说明

本文主要是介绍全志平台uboot中GPIO和PIN脚配置说明，希望对大家解决编程问题提供一定的参考价值，需要的开发者们随着小编来一起学习吧！

转自：https://www.ebaina.com/articles/140000004643?utm_source=searchindex&utm_medium=list&utm_campaign=140000004643

1.前言

这里描述uboot中关于GPIO和PIN脚配置的修改；以及dts中的规则说明

2.port接口对应数字编号

#define  PA  0
#define  PB  1
#define  PC  2
#define  PD  3
#define  PE  4
#define  PF  5
#define  PG  6
#define  PH  7
#define  PI  8
#define  PJ  9
#define  PK  10
#define  PL  11
#define  PM  12
#define  PN  13
#define  PO  14
#define  PP  15

3.Sysconfig中描述gpio的形式

Sysconfig中描述gpio的形式：
Port:端口+组内序号<功能分配><内部电阻状态><驱动能力><输出电平状态>

4.Pin配置说明

Pinctrl节点分为cpux和cpus，对应的节点路径如下：

Cpux :   /soc/pinctrl@xx
Cpus :   /soc/pinctrl@xx

(1)查看PIN配置

a. PIN配置属性字段说明

<allwinner,function>对应于sysconfig中的主键名
<allwinner,pins>对应于sysconfig中每个gpio配置中的端口名.
<allwinner,pname>对应于sysconfig中主键下面子键名字
<allwinner,muxsel>， <allwinner,pull>，<allwinner,drive>，<allwinner,data>这些属性分别表示<功能分配><内部电阻状态><驱动能力><输出电平状态>

b. 查看cpux的PIN配置

sunxi#fdt list /soc/pinctrl@01c20800/lcd0
lcd0@0 {linux,phandle = <0x000000ab>;phandle = <0x000000ab>;allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";allwinner,function = "lcd0";allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", "lcdd8", "lcdd9";allwinner,muxsel = <0x00000003>;allwinner,pull = <0x00000000>;allwinner,drive = <0xffffffff>;allwinner,data = <0xffffffff>;
};

c.查看CPUS的PIN配置

sunxi#fdt list /soc/pinctrl@01f02c00/s_uart0
s_uart0@0 {linux,phandle = <0x000000b4>;phandle = <0x000000b4>;allwinner,pins = "PL2", "PL3";allwinner,function = "s_uart0";allwinner,pname = "s_uart0_tx", "s_uart0_rx";allwinner,muxsel = <0x00000002>;allwinner,pull = <0xffffffff>;allwinner,drive = <0xffffffff>;allwinner,data = <0xffffffff>;
};

(2)修改PIN配置
使用fdt set命令可以修改PIN中相关属性字段

sunxi#fdt set /soc/pinctrl@01c20800/lcd0 allwinner,drive <0x1>
sunxi#fdt list /soc/pinctrl@01c20800/lcd0                     
lcd0@0 {linux,phandle = <0x000000ab>;phandle = <0x000000ab>;allwinner,pins = "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21";allwinner,function = "lcd0";allwinner,pname = "lcdd0", "lcdd1", "lcdd2", "lcdd3", "lcdd4", "lcdd5", "lcdd6", "lcdd7", "lcdd8", "lcdd9";allwinner,muxsel = <0x00000003>;allwinner,pull = <0x00000000>;allwinner,drive = <0x00000001>;allwinner,data = <0xffffffff>;
};

5.GPIO配置说明

（1）Device tree和sysconfig.fex中GPIO对应关系
以usb中usb_id_gpio为例

sunxi#fdt list /soc/usbc0                          
usbc0@0 {test = <0x00000002 0x00000003 0x12345678>;device_type = "usbc0";compatible = "allwinner,sun50i-otg-manager";........usb_serial_unique = <0x00000000>;usb_serial_number = "20080411";rndis_wceis = <0x00000001>;status = "okay";usb_id_gpio = <0x00000030 0x00000007 0x00000009 0x00000000 0x00000001 0xffffffff 0xffffffff>;
};usb_id_gpio         = port:PH09<0><1><default><default>

对应于device tree中
usb_id_gpio = <0x00000030 0x00000007 0x00000009 0x00000000 0x00000001 0xffffffff 0xffffffff>
由上面描述，端口PH 组内序号功能分配内部电阻状态驱动能力输出电平
2）修改GPIO配置
果需要修改 usb_id_gpio的配置，可按如下方式

sunxi#fdt set /soc/usbc0 usb_id_gpio <0x00000030 0x00000007 0x00000009 0x00000000 0x00000001 0x2 0x1>              
sunxi#fdt list                                                                        
usbc0@0 {test = <0x00000002 0x00000003 0x12345678>;device_type = "usbc0";compatible = "allwinner,sun50i-otg-manager";........usb_serial_unique = <0x00000000>;usb_serial_number = "20080411";rndis_wceis = <0x00000001>;status = "okay";usb_id_gpio = <0x00000030 0x00000007 0x00000009 0x00000000 0x00000001 0x00000002 0x00000001>;   //修改ok
};